mirror of
https://git.zaroz.cloud/nintendo-back-up/yuzu/yuzu-mainline.git
synced 2025-03-21 01:53:15 +00:00
Revert "Split huge interpreter source file into translation info and interpreter (+ some tiny misc style fixes)"
This commit is contained in:
archshift
GitHub
parent
7139e6353f
commit
0637dd93b5
@ -5,7 +5,6 @@ set(SRCS
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arm/dyncom/arm_dyncom_dec.cpp
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arm/dyncom/arm_dyncom_interpreter.cpp
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arm/dyncom/arm_dyncom_thumb.cpp
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arm/dyncom/arm_dyncom_trans.cpp
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arm/skyeye_common/armstate.cpp
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arm/skyeye_common/armsupp.cpp
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arm/skyeye_common/vfp/vfp.cpp
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@ -141,7 +140,6 @@ set(HEADERS
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arm/dyncom/arm_dyncom_interpreter.h
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arm/dyncom/arm_dyncom_run.h
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arm/dyncom/arm_dyncom_thumb.h
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arm/dyncom/arm_dyncom_trans.h
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arm/skyeye_common/arm_regformat.h
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arm/skyeye_common/armstate.h
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arm/skyeye_common/armsupp.h
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,492 +0,0 @@
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struct ARMul_State;
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typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper);
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enum class TransExtData {
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COND = (1 << 0),
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NON_BRANCH = (1 << 1),
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DIRECT_BRANCH = (1 << 2),
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INDIRECT_BRANCH = (1 << 3),
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CALL = (1 << 4),
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RET = (1 << 5),
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END_OF_PAGE = (1 << 6),
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THUMB = (1 << 7),
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SINGLE_STEP = (1 << 8)
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};
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struct arm_inst {
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unsigned int idx;
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unsigned int cond;
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TransExtData br;
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char component[0];
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};
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struct generic_arm_inst {
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u32 Ra;
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u32 Rm;
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u32 Rn;
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u32 Rd;
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u8 op1;
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u8 op2;
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};
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struct adc_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct add_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct orr_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct and_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct eor_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct bbl_inst {
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unsigned int L;
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int signed_immed_24;
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unsigned int next_addr;
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unsigned int jmp_addr;
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};
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struct bx_inst {
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unsigned int Rm;
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};
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struct blx_inst {
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union {
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s32 signed_immed_24;
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u32 Rm;
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} val;
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unsigned int inst;
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};
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struct clz_inst {
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unsigned int Rm;
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unsigned int Rd;
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};
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struct cps_inst {
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unsigned int imod0;
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unsigned int imod1;
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unsigned int mmod;
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unsigned int A, I, F;
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unsigned int mode;
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};
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struct clrex_inst {
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};
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struct cpy_inst {
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unsigned int Rm;
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unsigned int Rd;
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};
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struct bic_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct sub_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct tst_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct cmn_inst {
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unsigned int I;
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unsigned int Rn;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct teq_inst {
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unsigned int I;
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unsigned int Rn;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct stm_inst {
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unsigned int inst;
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};
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struct bkpt_inst {
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u32 imm;
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};
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struct stc_inst {
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};
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struct ldc_inst {
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};
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struct swi_inst {
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unsigned int num;
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};
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struct cmp_inst {
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unsigned int I;
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unsigned int Rn;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct mov_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct mvn_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct rev_inst {
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unsigned int Rd;
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unsigned int Rm;
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unsigned int op1;
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unsigned int op2;
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};
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struct rsb_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct rsc_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct sbc_inst {
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unsigned int I;
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int shifter_operand;
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shtop_fp_t shtop_func;
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};
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struct mul_inst {
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unsigned int S;
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unsigned int Rd;
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unsigned int Rs;
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unsigned int Rm;
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};
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struct smul_inst {
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unsigned int Rd;
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unsigned int Rs;
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unsigned int Rm;
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unsigned int x;
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unsigned int y;
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};
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struct umull_inst {
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unsigned int S;
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unsigned int RdHi;
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unsigned int RdLo;
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unsigned int Rs;
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unsigned int Rm;
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};
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struct smlad_inst {
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unsigned int m;
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unsigned int Rm;
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unsigned int Rd;
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unsigned int Ra;
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unsigned int Rn;
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unsigned int op1;
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unsigned int op2;
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};
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struct smla_inst {
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unsigned int x;
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unsigned int y;
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unsigned int Rm;
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unsigned int Rd;
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unsigned int Rs;
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unsigned int Rn;
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};
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struct smlalxy_inst {
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unsigned int x;
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unsigned int y;
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unsigned int RdLo;
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unsigned int RdHi;
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unsigned int Rm;
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unsigned int Rn;
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};
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struct ssat_inst {
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unsigned int Rn;
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unsigned int Rd;
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unsigned int imm5;
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unsigned int sat_imm;
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unsigned int shift_type;
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};
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struct umaal_inst {
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unsigned int Rn;
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unsigned int Rm;
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unsigned int RdHi;
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unsigned int RdLo;
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};
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struct umlal_inst {
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unsigned int S;
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unsigned int Rm;
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unsigned int Rs;
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unsigned int RdHi;
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unsigned int RdLo;
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};
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struct smlal_inst {
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unsigned int S;
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unsigned int Rm;
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unsigned int Rs;
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unsigned int RdHi;
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unsigned int RdLo;
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};
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struct smlald_inst {
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unsigned int RdLo;
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unsigned int RdHi;
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unsigned int Rm;
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unsigned int Rn;
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unsigned int swap;
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unsigned int op1;
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unsigned int op2;
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};
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struct mla_inst {
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unsigned int S;
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unsigned int Rn;
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unsigned int Rd;
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unsigned int Rs;
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unsigned int Rm;
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};
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struct mrc_inst {
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unsigned int opcode_1;
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unsigned int opcode_2;
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unsigned int cp_num;
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unsigned int crn;
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unsigned int crm;
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unsigned int Rd;
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unsigned int inst;
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};
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struct mcr_inst {
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unsigned int opcode_1;
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unsigned int opcode_2;
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unsigned int cp_num;
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unsigned int crn;
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unsigned int crm;
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unsigned int Rd;
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unsigned int inst;
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};
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struct mcrr_inst {
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unsigned int opcode_1;
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unsigned int cp_num;
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unsigned int crm;
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unsigned int rt;
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unsigned int rt2;
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};
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struct mrs_inst {
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unsigned int R;
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unsigned int Rd;
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};
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struct msr_inst {
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unsigned int field_mask;
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unsigned int R;
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unsigned int inst;
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};
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struct pld_inst {
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};
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struct sxtb_inst {
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unsigned int Rd;
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unsigned int Rm;
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unsigned int rotate;
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};
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struct sxtab_inst {
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unsigned int Rd;
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unsigned int Rn;
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unsigned int Rm;
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unsigned rotate;
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};
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struct sxtah_inst {
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unsigned int Rd;
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unsigned int Rn;
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unsigned int Rm;
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unsigned int rotate;
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};
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struct sxth_inst {
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unsigned int Rd;
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unsigned int Rm;
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unsigned int rotate;
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};
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struct uxtab_inst {
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unsigned int Rn;
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unsigned int Rd;
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unsigned int rotate;
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unsigned int Rm;
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};
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struct uxtah_inst {
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unsigned int Rn;
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unsigned int Rd;
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unsigned int rotate;
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unsigned int Rm;
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};
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struct uxth_inst {
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unsigned int Rd;
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unsigned int Rm;
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unsigned int rotate;
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};
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struct cdp_inst {
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unsigned int opcode_1;
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unsigned int CRn;
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unsigned int CRd;
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unsigned int cp_num;
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unsigned int opcode_2;
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unsigned int CRm;
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unsigned int inst;
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};
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struct uxtb_inst {
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unsigned int Rd;
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unsigned int Rm;
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unsigned int rotate;
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};
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struct swp_inst {
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unsigned int Rn;
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unsigned int Rd;
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unsigned int Rm;
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};
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struct setend_inst {
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unsigned int set_bigend;
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};
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struct b_2_thumb {
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unsigned int imm;
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};
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struct b_cond_thumb {
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unsigned int imm;
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unsigned int cond;
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};
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struct bl_1_thumb {
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unsigned int imm;
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};
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struct bl_2_thumb {
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unsigned int imm;
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};
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struct blx_1_thumb {
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unsigned int imm;
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unsigned int instr;
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};
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struct pkh_inst {
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unsigned int Rm;
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unsigned int Rn;
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unsigned int Rd;
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unsigned char imm;
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};
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#define VFP_INTERPRETER_STRUCT
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#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
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#undef VFP_INTERPRETER_STRUCT
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typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr);
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struct ldst_inst {
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unsigned int inst;
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get_addr_fp_t get_addr;
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};
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typedef arm_inst* ARM_INST_PTR;
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typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int);
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extern const transop_fp_t arm_instruction_trans[];
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extern const size_t arm_instruction_trans_len;
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#define TRANS_CACHE_SIZE (64 * 1024 * 2000)
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extern char trans_cache_buf[TRANS_CACHE_SIZE];
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extern size_t trans_cache_buf_top;
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@ -26,7 +26,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -75,7 +75,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -124,7 +124,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -174,7 +174,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -223,7 +223,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -272,7 +272,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index)
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = TransExtData::NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->dp_operation = BIT(inst, 8);
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inst_cream->instr = inst;
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@ -321,7 +321,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index)
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|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -370,7 +370,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -419,7 +419,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -470,7 +470,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
|
||||
@ -518,7 +518,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
|
||||
@ -560,7 +560,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -610,7 +610,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -659,7 +659,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -708,7 +708,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -757,7 +757,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -806,7 +806,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -857,7 +857,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -906,7 +906,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
@ -962,7 +962,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
@ -1006,7 +1006,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->reg = BITS(inst, 16, 19);
|
||||
inst_cream->Rt = BITS(inst, 12, 15);
|
||||
@ -1069,7 +1069,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
@ -1115,7 +1115,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->reg = BITS(inst, 16, 19);
|
||||
inst_cream->Rt = BITS(inst, 12, 15);
|
||||
@ -1200,7 +1200,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
@ -1253,7 +1253,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int inde
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
@ -1301,7 +1301,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
@ -1354,7 +1354,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
@ -1420,7 +1420,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4);
|
||||
@ -1495,7 +1495,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
@ -1580,7 +1580,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4));
|
||||
@ -1653,7 +1653,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
@ -1722,7 +1722,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index)
|
||||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
inst_base->br = NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user