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	Merge pull request #4125 from lioncash/macro-shift
macro_jit_x64: Amend readability of Compile_ExtractShiftLeftRegister()
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						928e9c09aa
					
				@ -239,10 +239,10 @@ void MacroJITx64Impl::Compile_ExtractInsert(Macro::Opcode opcode) {
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}
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void MacroJITx64Impl::Compile_ExtractShiftLeftImmediate(Macro::Opcode opcode) {
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    auto dst = Compile_GetRegister(opcode.src_a, eax);
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    auto src = Compile_GetRegister(opcode.src_b, RESULT);
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    const auto dst = Compile_GetRegister(opcode.src_a, eax);
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    const auto src = Compile_GetRegister(opcode.src_b, RESULT);
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    shr(src, al);
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    shr(src, dst.cvt8());
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    if (opcode.bf_size != 0 && opcode.bf_size != 31) {
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        and_(src, opcode.GetBitfieldMask());
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    } else if (opcode.bf_size == 0) {
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@ -258,8 +258,8 @@ void MacroJITx64Impl::Compile_ExtractShiftLeftImmediate(Macro::Opcode opcode) {
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}
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void MacroJITx64Impl::Compile_ExtractShiftLeftRegister(Macro::Opcode opcode) {
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    auto dst = Compile_GetRegister(opcode.src_a, eax);
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    auto src = Compile_GetRegister(opcode.src_b, RESULT);
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    const auto dst = Compile_GetRegister(opcode.src_a, eax);
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    const auto src = Compile_GetRegister(opcode.src_b, RESULT);
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    if (opcode.bf_src_bit != 0) {
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        shr(src, opcode.bf_src_bit);
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@ -268,7 +268,8 @@ void MacroJITx64Impl::Compile_ExtractShiftLeftRegister(Macro::Opcode opcode) {
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    if (opcode.bf_size != 31) {
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        and_(src, opcode.GetBitfieldMask());
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    }
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    shl(src, al);
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    shl(src, dst.cvt8());
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    Compile_ProcessResult(opcode.result_operation, opcode.dst);
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}
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