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	Merge pull request #422 from bunnei/shader-mov
Shader instructions MOV_C, MOV_R, and several minor GPU things
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				| @ -208,6 +208,16 @@ void Maxwell3D::DrawArrays() { | ||||
| 
 | ||||
|     const bool is_indexed{regs.index_array.count && !regs.vertex_buffer.count}; | ||||
|     VideoCore::g_renderer->Rasterizer()->AccelerateDrawBatch(is_indexed); | ||||
| 
 | ||||
|     // TODO(bunnei): Below, we reset vertex count so that we can use these registers to determine if
 | ||||
|     // the game is trying to draw indexed or direct mode. This needs to be verified on HW still -
 | ||||
|     // it's possible that it is incorrect and that there is some other register used to specify the
 | ||||
|     // drawing mode.
 | ||||
|     if (is_indexed) { | ||||
|         regs.index_array.count = 0; | ||||
|     } else { | ||||
|         regs.vertex_buffer.count = 0; | ||||
|     } | ||||
| } | ||||
| 
 | ||||
| void Maxwell3D::ProcessCBBind(Regs::ShaderStage stage) { | ||||
|  | ||||
| @ -310,6 +310,7 @@ public: | ||||
|         SHR_C, | ||||
|         SHR_R, | ||||
|         SHR_IMM, | ||||
|         FMNMX, | ||||
|         FSETP_C, // Set Predicate
 | ||||
|         FSETP_R, | ||||
|         FSETP_IMM, | ||||
| @ -460,6 +461,7 @@ private: | ||||
|             INST("0100110000101---", Id::SHR_C, Type::Arithmetic, "SHR_C"), | ||||
|             INST("0101110000101---", Id::SHR_R, Type::Arithmetic, "SHR_R"), | ||||
|             INST("0011100-00101---", Id::SHR_IMM, Type::Arithmetic, "SHR_IMM"), | ||||
|             INST("0101110001100---", Id::FMNMX, Type::Arithmetic, "FMNMX"), | ||||
|             INST("0100110011100---", Id::I2I_C, Type::Conversion, "I2I_C"), | ||||
|             INST("0101110011100---", Id::I2I_R, Type::Conversion, "I2I_R"), | ||||
|             INST("01110001-1000---", Id::I2I_IMM, Type::Conversion, "I2I_IMM"), | ||||
|  | ||||
| @ -664,6 +664,12 @@ private: | ||||
|             } | ||||
| 
 | ||||
|             switch (opcode->GetId()) { | ||||
|             case OpCode::Id::MOV_C: | ||||
|             case OpCode::Id::MOV_R: { | ||||
|                 regs.SetRegisterToFloat(instr.gpr0, 0, op_b, 1, 1); | ||||
|                 break; | ||||
|             } | ||||
| 
 | ||||
|             case OpCode::Id::MOV32_IMM: { | ||||
|                 // mov32i doesn't have abs or neg bits.
 | ||||
|                 regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1); | ||||
|  | ||||
| @ -36,6 +36,18 @@ inline GLenum VertexType(Maxwell::VertexAttribute attrib) { | ||||
|         return {}; | ||||
|     } | ||||
| 
 | ||||
|     case Maxwell::VertexAttribute::Type::SignedNorm: { | ||||
| 
 | ||||
|         switch (attrib.size) { | ||||
|         case Maxwell::VertexAttribute::Size::Size_8_8_8_8: | ||||
|             return GL_BYTE; | ||||
|         } | ||||
| 
 | ||||
|         NGLOG_CRITICAL(Render_OpenGL, "Unimplemented vertex size={}", attrib.SizeString()); | ||||
|         UNREACHABLE(); | ||||
|         return {}; | ||||
|     } | ||||
| 
 | ||||
|     case Maxwell::VertexAttribute::Type::Float: | ||||
|         return GL_FLOAT; | ||||
|     } | ||||
|  | ||||
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