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	GPU: Handle the SetShader method call (0xE24) and store the shader config.
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				@ -9,7 +9,7 @@ namespace Tegra {
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namespace Engines {
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					namespace Engines {
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const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
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					const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
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    {0xE24, {"PrepareShader", 5, &Maxwell3D::PrepareShader}},
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					    {0xE24, {"SetShader", 5, &Maxwell3D::SetShader}},
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};
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					};
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Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
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					Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
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@ -79,7 +79,27 @@ void Maxwell3D::DrawArrays() {
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    LOG_WARNING(HW_GPU, "Game requested a DrawArrays, ignoring");
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					    LOG_WARNING(HW_GPU, "Game requested a DrawArrays, ignoring");
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}
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					}
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void Maxwell3D::PrepareShader(const std::vector<u32>& parameters) {}
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					void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
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					    /**
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					     * Parameters description:
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					     * [0] = Shader Program.
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					     * [1] = Unknown.
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					     * [2] = Offset to the start of the shader, after the 0x30 bytes header.
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					     * [3] = Shader Type.
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					     * [4] = Shader End Address >> 8.
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					     */
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					    auto shader_program = static_cast<Regs::ShaderProgram>(parameters[0]);
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					    // TODO(Subv): This address is probably an offset from the CODE_ADDRESS register.
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					    GPUVAddr begin_address = parameters[2];
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					    auto shader_type = static_cast<Regs::ShaderType>(parameters[3]);
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					    GPUVAddr end_address = parameters[4] << 8;
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					    auto& shader = state.shaders[static_cast<size_t>(shader_program)];
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					    shader.program = shader_program;
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					    shader.type = shader_type;
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					    shader.begin_address = begin_address;
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					    shader.end_address = end_address;
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					}
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} // namespace Engines
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					} // namespace Engines
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} // namespace Tegra
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					} // namespace Tegra
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@ -4,6 +4,7 @@
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#pragma once
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					#pragma once
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					#include <array>
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#include <unordered_map>
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					#include <unordered_map>
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#include <vector>
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					#include <vector>
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#include "common/bit_field.h"
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					#include "common/bit_field.h"
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@ -104,7 +105,7 @@ public:
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                    u32 gpr_alloc;
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					                    u32 gpr_alloc;
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                    ShaderType type;
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					                    ShaderType type;
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                    INSERT_PADDING_WORDS(9);
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					                    INSERT_PADDING_WORDS(9);
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                } shader_config[6];
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					                } shader_config[MaxShaderProgram];
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                INSERT_PADDING_WORDS(0x5D0);
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					                INSERT_PADDING_WORDS(0x5D0);
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@ -120,6 +121,19 @@ public:
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    static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
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					    static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
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					    struct State {
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					        struct ShaderInfo {
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					            Regs::ShaderType type;
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					            Regs::ShaderProgram program;
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					            GPUVAddr begin_address;
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					            GPUVAddr end_address;
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					        };
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					        std::array<ShaderInfo, Regs::MaxShaderProgram> shaders;
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					    };
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					    State state;
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private:
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					private:
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    MemoryManager& memory_manager;
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					    MemoryManager& memory_manager;
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@ -130,7 +144,7 @@ private:
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    void DrawArrays();
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					    void DrawArrays();
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    /// Method call handlers
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					    /// Method call handlers
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    void PrepareShader(const std::vector<u32>& parameters);
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					    void SetShader(const std::vector<u32>& parameters);
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    struct MethodInfo {
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					    struct MethodInfo {
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        const char* name;
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					        const char* name;
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